1. Field of the Invention
The present invention relates generally to a driving circuit for outputting a driving voltage and, more particularly, to a driving circuit that provides a large output driving voltage range while utilizing transistors that have relatively lower voltage tolerance.
2. Description of the Related Art
A conventional liquid crystal display (LCD) comprises an array of pixels arranged in rows and columns. The image information displayed at each pixel, e.g., a shade of grey or color, is controlled by the magnitude of a driving voltage applied thereto. The LCD is typically driven by enabling one row of pixels of the display, at one time, and applying driving voltages to the respective columns of pixels. This process is repeated for each row of the display to generate a complete displayed image. The entire process is periodically repeated to updated the displayed image.
In accordance with current designs of LCDs, it is desirable to apply a driving voltage to each pixel in a relatively large voltage range, e.g., 0-12 volts. Theoretically, in order for a driving circuit constructed of MOSFETs to be capable of outputting driving voltages over such a range, the individual transistors would need to be designed to tolerate the highest output voltage, e.g., 12 volts. This would result in the transistors each being relatively physically large to provide tolerance to an output voltage that the transistors are only occasionally subjected to during operation. Also, disadvantageously, the larger size of these transistors results in the circuitry into which they are integrated to take up more physical space. Such additional physical space generally equates with additional cost and size for the LCD.
One solution to the problems created by the use of MOSFETs sized to tolerate the full range of driving voltage is to limit the range of voltage to which each individual transistor in the driving circuit is subjected. One way this has been accomplished is by limiting the voltages applied across the gate oxides of the driving transistors to be less than the gate oxide breakdown voltage. More particularly, this is achieved for each driving transistor by selecting a fixed voltage for application to its gate terminal to result in the voltage across the gate oxide being less than the gate oxide breakdown voltage. However, in order to implement this arrangement in a driving circuit with a large output voltage range, it is necessary to divide the desired driving voltage range into two portions and provide two MOSFETs respectively associated with the two portions.
In conventional practice it has also been necessary to couple desired output voltages to the individual driving circuit transistors through multiplexing circuitry. Such multiplexing circuitry increases the complexity and cost of the driving circuitry and slows down operations, to the detriment of LCD operation.
Accordingly, the present invention is directed to a driving circuit that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the method and apparatus particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described, there is provided a circuit for outputting one of first and second analog voltages in first and second voltage ranges, respectively, the first voltage range being within a range from a high voltage V1 to a low voltage V2, the second voltage range being within a range from a high voltage V3 to a low voltage V4, comprising: a first digital-to-analog converter coupled to receive a first digital input signal corresponding to the first voltage range; a second digital-to-analog converter coupled to receive a second digital input signal corresponding to the second voltage range; an output terminal; a first gating circuit coupled between an analog output of the first digital-to-analog converter and the output terminal; a second gating circuit coupled between an analog output of the second digital-to-analog converter and the output terminal; wherein when the first digital input signal has a magnitude corresponding to the first voltage range and the second digital signal has a magnitude causing the output of the second digital-to-analog converter to render the second gating circuit nonconductive, the first analog voltage is output by the first digital-to-analog converter on the output terminal; and wherein when the second digital input signal has a magnitude corresponding to the second voltage and the first digital signal has a magnitude causing the output of the first digital-to-analog converter to render the first gating circuit nonconductive, the second analog voltage is output by the second digital-to-analog converter on the output terminal.
Also in accordance with the present invention, there is provided a method for generating one of first and second analog voltages in first and second voltage ranges, respectively, the first voltage range being within a range from a high voltage V1 to a low voltage V2, the second voltage range being within a range from a high voltage V3 to a low voltage V4, comprising: receiving at a first digital-to-analog converter a first digital input signal having a magnitude corresponding to the first voltage range; receiving at a second digital-to-analog converter a second digital input signal having a magnitude corresponding to the second voltage range; applying a first predetermined voltage to a first gating circuit coupled between an analog output of the first digital-to-analog converter and an output terminal; applying a second predetermined voltage to a second gating circuit coupled between an analog output of the second digital-to-analog converter and the output terminal; outputting the first analog voltage on the output terminal when the first digital input signal has a magnitude corresponding to the first voltage range and the second digital signal has a magnitude causing the output of the second digital-to-analog converter to render the second gating circuit nonconductive; and outputting the second analog voltage on the output terminal when the second digital input signal has a magnitude corresponding to the second voltage range and the first digital signal has a magnitude causing the output of the first digital-to-analog converter to render the first gating circuit nonconductive.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention, and together with the description serve to explain principles of the invention.